PURWARUPA MIKROPROSESOR BERBASIS FPGA ALTERA EPF10K10 DENGAN DESKRIPSI VHDL

Agfianto Eko Putra, Arsyad Muhammad Fajri

Abstract


It has been designed and implemented an FPGA-based microprocessor prototype using Altera EPF10K10 and VHDL description then compiled and simulate using MAX+Plus II software. The microprocessor prototype is implementing using the Wizard A-01 development board and its assembly program stored in ROM. To decode and execute the instruction, it used Control Unit, which will send control signal to other components. The 16 instructions is implementing in this microprocessor prototype. This microprocessor prototype has 8-bit data bus and 4-bit address bus, implemented using 375 logic cells, operating at 14.72 MHz clock (maximum) and 3.68 MIPS.

References


Chu, P. P., 2006, RTL Hardware Design Using VHDL, John Wiley & Sons Inc., New Jersey.

He, Y. Z., 2002, Building A RISC Microcontroller in an FPGA, Faculty of Electrical Engineering, Universiti Teknologi Malaysia.

Hwang, E.O., 2004, Microprocessor Design Principles and Practices With VHDL, Brooks / Cole, California.

Hwang, E. O., 2005, Digital Logic and Microprocessor Design with VHDL, Brooks / Cole, California.

Maxfield, C.., 2004, The Design Warrior’s Guide to FPGAs. Mentor Graphics Corporation and Xilinx, Inc, USA.

Rafiquzzaman, M., 2005, Fundamentals of Digital Logic and Microcomputer Design. John Wiley & Sons, Inc., Hoboken, New Jersey.

Tanenbaum, A. S., 2001, Organisasi Komputer Terstruktur, Salemba Teknika, Jakarta.

Turley, J., 2002, Design Your Own Microprocessor, Circuit Cellar Magazine, http://www.circuitcellar.com/

Zeidman, B., 2004, Introduction to CPLD and FPGA Design, Embedded System Conference, San Fransisco.


Refbacks

  • There are currently no refbacks.